1. Field of the Invention
The present invention relates to bump fabrication, and in particular, a bump fabrication method to increase the wettability of wetting layer of the under bump metallurgy (UBM) layer.
2. Description of the Related Art
In IC packaging technology, the first level package is the connection of chips to carrier. The common types of package are, for example, wire bonding, tape automatic bonding (TAB), flip chip (F/C), etc. However, in either TAB or F/C, in the course of bonding chips to the carrier, a bump has to be made on the pad of the wafer, and the bump is used as an electrical media for the chips and the carrier. The common types of bump, generally, are solder bump, gold bump, conductive polymer bump and polymer bump. Among all these, the solder bump is most widely applied.
FIGS. 1A to 1F there is show a conventional solder bump fabrication method. As shown in FIG. 1A, the active surface 112 of the wafer 110 is provided with a passivation layer 114 and a plurality of bonding pads 116 (only one shown).
The passivation layer 114 exposes the bonding pad 116 on the top of the active surface 112. Next, as shown in FIG. 1B, evaporation, sputter or plating method is used to form an under bump metallurgy (UBM) layer 120 on the bonding pad 116.
Next, as shown in FIG. 1C, a patterned masking layer 130 is formed on the active surface 112 of the wafer 110, using a plurality of openings 132 (one has been shown) on the masking layer 130, exposing the UBM layer 120. Next, as shown in FIG. 1D, a printing method is used to fill solder paste 140 into the space formed by the openings 132 and the UBM layer 120. After that, as shown in FIG. 1E, a re-flow process is performed such that the solder paste 140 is finally formed into a bump 142 having a ball shape.
Lastly, the masking layer 130 is removed, exposing the bump 142 on the active surface 112 of the wafer 110.
Referring to 1C to 1E, the UBM layer 120 generally comprises a wetting layer 122, a barrier layer 124 and an adhesion layer 126. The wetting layer 122 is used to bond with the bump 142, and thus, the wetting layer 122 must possess excellent wettability so as to provide better bonding between the bump 142 and the wetting layer 122. Besides, the material of the solder paste 140 includes tin (Sn), and there is excellent bonding between copper (Cu) and tin. Thus, in the course of forming the UBM layer 120, generally, copper is used as material for the wetting layer 122.
In view of the above, as copper and oxygen in the air can be easily oxidized to form copper oxide, however, the bonding between copper oxide and tin is poor. Thus, when copper is used as material for the wetting layer 122, in order to remove copper oxide formed on the wetting layer 122, the unoxidized copper underneath is exposed so as to increase the wettability of the wetting layer 122. As shown in FIG. 1C, in a conventional method, plasma ashing 150 is used to remove the copper oxide formed on the wetting layer 122 so as to expose the unoxidized copper. However, in the conventional method where plasma ashing 150 is used to remove the copper oxide of the wetting layer 122, if solder paste 140 has not filled the opening 132 on time to perform a re-flow process to form a bump, when the copper of the wetting layer 122 comes in contact with oxygen, copper will again oxidize to form copper oxide.
Accordingly, it is an object of the present invention to provide a bump fabrication method, wherein after the bonding pad of a wafer is formed with a UBM layer, and before the bump is formed on the UBM layer, plasma ashing is employed in sequence to remove the oxidized region of the wetting layer, exposing the unoxidized region, and after that, on the wetting layer of the UBM layer a flux film is formed instantaneously.
This can prevent the wetting layer from being oxidized again, and in the course of re-flow process, the oxidized region of the wetting layer is reduced, improving the wettability of bump on the wetting layer.
An aspect of the present invention is to provide a bump fabrication method comprising the steps of providing a wafer having an active surface and a plurality of bonding pads distributed on the active surface; respectively forming into an under bump metallurgy layer onto the bonding pads, wherein at least each of the under bump metallurgy layers includes at least a wetting layer positioned at the topmost layer of the under bump metallurgy layer; patterning a masking layer on the active surface wherein the masking layer has a plurality of openings to expose the wetting layer with oxidized region thereon; removing the oxidized region of the wetting layer using plasma ashing process; fully forming a flux film on the active layer, wherein at least a portion of the flux film covers the wetting layer; filling a solder paste into the openings; performing a re-flow process to form a plurality of bumps after the solder paste melts so that the flux film removes the oxidized region of the wetting layer; and removing the masking layer.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.